The present invention relates to the testing of analog and mixed-signal circuits. More particularly, although not exclusively, the present application relates to the testing of analog and/or mixed-signal circuits in both built in self test (BIST) and production environments.
The use of mixed-signal circuits continues to grow, as does their complexity. At the same time, there is a need for such devices to be of lower cost and to have decreased production time. One significant obstacle in trying to meet these constraints involves the resources required for testing. These resources can include the time it takes to test each device, the costs of testing and measurement equipment, and the availability of testing and measurement equipment. In addition, there is a problem in that the load of the tester may mask or alter the measurements of the device under test.
Therefore, it can be seen that problems with testing analog and/or mixed-signal circuits in both production test and BIST environments remains. Thus, it is a primary object of the invention to improve upon the state of the art.
A further object, feature, or advantage of the present invention is to provide for a method of testing that allows for the production of high performance mixed-signal integrated circuits using low cost components and subcircuits.
A still further object, feature, or advantage of the present invention is to provide for accurate and complete testing of high performance analog and mixed-signal circuits.
Another object, feature, or advantage of the present invention is to provide for accurate testing of analog and mixed-signal circuits suitable for application in a low cost production test environment.
Yet another object, feature, or advantage of the present invention is to provide for testing of analog and mixed-signal circuits suitable for use in built-in self test applications.
Yet another object, feature, or advantage of the present invention is to provide performance enhancement, yield enhancement and/or area reduction by using feedback from a BIST structure to adapt or calibrate the device under test (DUT).
These and/or other objects, features, and advantages of the present invention will become apparent from the subject matter disclosed herein.